clock gating (Q590170)
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technique used in synchronous circuits for reducing dynamic power dissipation, by adding more logic to a circuit to prune the clock tree (disabling portions of the circuitry so that the flip-flops in them do not have to switch states)
| Language | Label | Description | Also known as |
|---|---|---|---|
| English | clock gating |
technique used in synchronous circuits for reducing dynamic power dissipation, by adding more logic to a circuit to prune the clock tree (disabling portions of the circuitry so that the flip-flops in them do not have to switch states) |
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Clock gating
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Wikipedia(11 entries)
- cawiki Clock gating
- dewiki Clock-Gating
- enwiki Clock gating
- fawiki دروازه بندی ساعت
- frwiki Clock gating
- hewiki Clock Gating
- itwiki Clock gating
- kowiki 클럭 게이팅
- ruwiki Clock gating
- ukwiki Clock gating
- zhwiki 时钟门控
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- commonswiki Category:Clock gating