clock gating (Q590170)
Jump to navigation
Jump to search
technique used in synchronous circuits for reducing dynamic power dissipation, by adding more logic to a circuit to prune the clock tree (disabling portions of the circuitry so that the flip-flops in them do not have to switch states)
Language | Label | Description | Also known as |
---|---|---|---|
English | clock gating |
technique used in synchronous circuits for reducing dynamic power dissipation, by adding more logic to a circuit to prune the clock tree (disabling portions of the circuitry so that the flip-flops in them do not have to switch states) |
Statements
Clock gating
0 references
Identifiers
1 reference
Sitelinks
Wikipedia(11 entries)
- cawiki Clock gating
- dewiki Clock-Gating
- enwiki Clock gating
- fawiki دروازه بندی ساعت
- frwiki Clock gating
- hewiki Clock Gating
- itwiki Clock gating
- kowiki 클럭 게이팅
- ruwiki Clock gating
- ukwiki Clock gating
- zhwiki 时钟门控
Wikibooks(0 entries)
Wikinews(0 entries)
Wikiquote(0 entries)
Wikisource(0 entries)
Wikiversity(0 entries)
Wikivoyage(0 entries)
Wiktionary(0 entries)
Multilingual sites(1 entry)
- commonswiki Category:Clock gating